insufficient TLB flush for x86 PV guests in shadow mode For migration as well as to work around kernels unaware of L1TF (see XSA-273), PV guests may be run in shadow paging mode. To address XSA-401, code was moved inside a function in Xen. This code movement missed a variable changing meaning / value between old and new code positions. The now wrong use of the variable did lead to a wrong TLB flush condition, omitting flushes where such are necessary.
CVSS Details
- CVSS 3.1 Base Score: 8.8
- CVSS 3.1 Vector: (CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:H/A:H)
Covered by Rapid7
| Product | Vendor Advisory | Solution File | Added | Published |
|---|---|---|---|---|
| Alpine Linux | — | Upgrade xen | Mar 26, 2024 | Jul 26, 2022 |
| Debian | — | Upgrade xen | Nov 8, 2022 | Jul 26, 2022 |
| Suse | — | Upgrade xen-libs-32bitUpgrade xen-doc-htmlUpgrade xen-toolsUpgrade xen-libsUpgrade xen-develUpgrade xenUpgrade xen-tools-domUUpgrade xen-tools-xendomains-wait-disk | Oct 26, 2022 | Jul 26, 2022 |
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